Please use this identifier to cite or link to this item: https://elib.vku.udn.vn/handle/123456789/3308
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dc.contributor.authorDuong, Huu Ai-
dc.contributor.authorVuong, Cong Dat-
dc.contributor.authorLuong, Khanh Ty-
dc.contributor.authorLe, Viet Truong-
dc.date.accessioned2023-12-08T07:00:27Z-
dc.date.available2023-12-08T07:00:27Z-
dc.date.issued2023-12-
dc.identifier.issn2502-4752-
dc.identifier.urihttp://doi.org/10.11591/ijeecs.v32.i3.pp1378-1383-
dc.identifier.urihttp://elib.vku.udn.vn/handle/123456789/3308-
dc.descriptionIndonesian Journal of Electrical Engineering and Computer Science; Vol. 32, No. 3; pp. 1378~1383vi_VN
dc.description.abstractField programmable gate array (FPGA) is an integrated circuit consisting of internal hardware blocks with programmable link connections for users to customize operations for a particular application. Link connections can be easily reprogrammed, allowing the FPGA to adapt to changes to the design or even support a new application throughout the department's uptime. One of the important tasks in image processing is image edge detection image, with computer aided, image recognition is concerned with the recognition and classification of objects in an image, so edge detection is an important tool. In this paper, we design filter for edge detection in image processing using FPGA kit. We analysis and implementation of algorithm for image processing on FPGA, load the code and run the results. Comparative analysis with images processed by MATLAB software.vi_VN
dc.language.isoenvi_VN
dc.publisherIndonesian Journal of Electrical Engineering and Computer Sciencevi_VN
dc.subjectAlgorithm for image processingvi_VN
dc.subjectDesign filtervi_VN
dc.subjectField-programmable gate arrayvi_VN
dc.subjectImage edge detectionvi_VN
dc.subjectImage processingvi_VN
dc.titleField programmable gate array implementation of edge detection system based on an improved sobel edge detectorvi_VN
dc.typeWorking Papervi_VN
Appears in Collections:NĂM 2023

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