Please use this identifier to cite or link to this item:
https://elib.vku.udn.vn/handle/123456789/4182
Title: | Design of mean filter using field programmable gate arrays for digital images |
Authors: | Duong, Huu Ai Nguyen, Van Loi Luong, Khanh Ty Le, Viet Truong |
Keywords: | Algorithm for image processing Design filter Field-programmable gate array Image edge detection Image processing |
Issue Date: | Dec-2024 |
Publisher: | Indonesian Journal of Electrical Engineering and Computer Science |
Abstract: | In this paper, we design and analysis of mean filter using field programmable gate arrays (FPGAs) for digital images, FPGAs are integrated circuits consisting of interconnections that connect programmable internal hardware blocks allows users to customize operations for a specific application. FPGA is an ideal choice for real-time image processing, these FPGA devices are controlled in Verilog or VHDL languages, allowing to design at different levels and adapt to design changes or even support new applications throughout the life of the component. Digital image filtering is the most important task in image processing and with the help of computers, image recognition involves identifying and classifying objects in an image. This paper design of mean filter for digital image processing, implementation and analysis of image processing algorithms on FPGAs. The results obtained on the FPGA are compared and analyzed with the results by MATLAB software. |
Description: | Indonesian Journal of Electrical Engineering and Computer Science; Vol. 36, No. 3, pp. 1430~1436. |
URI: | 10.11591/ijeecs.v36.i3.pp1430-1436 https://elib.vku.udn.vn/handle/123456789/4182 |
ISSN: | 2502-4752 |
Appears in Collections: | NĂM 2024 |
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