Please use this identifier to cite or link to this item:
https://elib.vku.udn.vn/handle/123456789/6254| Title: | Designing Digital Systems with SystemVerilog (Version 1.0) |
| Authors: | Brent, E. Nelson |
| Keywords: | Digital Systems SystemVerilog |
| Issue Date: | 2018 |
| Publisher: | Brigham Young University |
| Description: | pp: 327 |
| URI: | https://elib.vku.udn.vn/handle/123456789/6254 |
| Appears in Collections: | Thiết kế Vi mạch bán dẫn |
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