Please use this identifier to cite or link to this item:
https://elib.vku.udn.vn/handle/123456789/7000| Title: | Research and design of a Low-power systolic array IP core for Tensor processors |
| Other Titles: | Nghiên cứu và thiết kế lõi IP mảng song song công suất thấp cho bộ xử lý tensor |
| Authors: | Nguyen, Nhat An Nguyen, Quang Dai |
| Keywords: | Low-power IP core Tensor |
| Issue Date: | Jun-2026 |
| Publisher: | Vietnam-Korea University of Information and Communication Technology |
| Series/Report no.: | KLTN;22CE.B003 |
| Description: | Graduation Project of Computer Engineering Technology; 2022 - 2026. |
| URI: | https://elib.vku.udn.vn/handle/123456789/7000 |
| Appears in Collections: | ĐH-Ngành Công nghệ kỹ thuật máy tính (Computer Engineering) - Chuyên ngành Thiết kế vi mạch bán dẫn (Semiconductor IC Design) |
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